Symbolic Functional Decomposition Method for Implementation of Finite State Machines in FPGA Devices

Piotr Wojciech Szotkowski

Abstract

This dissertation presents the method of symbolic functional decomposition, a novel approach to implementation of finite state machines in FPGA devices. Symbolic functional decomposition addresses the main drawback shared by all of the current state-of-the-art approaches – the separation of state encoding and mapping stages – by partially encoding the FSMs’ states during the mapping process; this enables the optimisation of every iteration of the multi-level synthesis process. The experimental results presented in this dissertation prove the effectiveness of this method and its universal application for implementation of FSMs in FPGA devices.
Diploma typeDoctor of Philosophy
Author Piotr Wojciech Szotkowski (FEIT / IT)
Piotr Wojciech Szotkowski,,
- The Institute of Telecommunications
Title in EnglishSymbolic Functional Decomposition Method for Implementation of Finite State Machines in FPGA Devices
Languageen angielski
Certifying UnitFaculty of Electronics and Information Technology (FEIT)
Disciplinetelecommunications / (technology domain) / (technological sciences)
Start date25-09-2007
Defense Date19-09-2010
End date21-10-2010
Supervisor Tadeusz Łuba (FEIT / IT)
Tadeusz Łuba,,
- The Institute of Telecommunications

Internal reviewers Andrzej Kraśniewski (FEIT / IT)
Andrzej Kraśniewski,,
- The Institute of Telecommunications
External reviewers Marian Andrzej Adamski - [Uniwersytet Zielonogórski (UZ)]
Marian Andrzej Adamski,,
-
- Uniwersytet Zielonogórski
Pages99
Keywords in Englishfinite state machine, FPGA reprogrammable systems, digital system synthesis
Abstract in EnglishThis dissertation presents the method of symbolic functional decomposition, a novel approach to implementation of finite state machines in FPGA devices. Symbolic functional decomposition addresses the main drawback shared by all of the current state-of-the-art approaches – the separation of state encoding and mapping stages – by partially encoding the FSMs’ states during the mapping process; this enables the optimisation of every iteration of the multi-level synthesis process. The experimental results presented in this dissertation prove the effectiveness of this method and its universal application for implementation of FSMs in FPGA devices.
PKT classification410000 Informatyka; 412100 Arytmetyka i logika maszyn cyfrowych 412300 Sposób przedstawiania informacji w maszynie. Teoria kodów 710000 Łączność telekomunikacyjna 710900 Teoria telekomunikacji. Zagadnienia podstawowe telekomunikacji
KBN classification28 - informatyka; 35 - telekomunikacja
EU classificationNauki Inżynieryjne i Techniczne Nauki Inżynieryjne i Techniczne - Elektrotechnika Elektronika Inżynieria Informatyczna Nauki Inżynieryjne i Techniczne - Elektrotechnika Elektronika Inżynieria Informatyczna - Telekomunikacja Nauki Inżynieryjne i Techniczne - Elektrotechnika Elektronika Inżynieria Informatyczna - Sprzęt Komputerowy i Architektura Komputerów
ProjectSymbolic functional decomposition for implementation of finite state machines in FPGA structures. Project leader: Łuba Tadeusz, , start date 08-10-2008, end date 03-02-2010, IT/2008/Badawczy/18, Completed
WEiTI Projekty finansowane przez MNiSW
Thesis file
thesis Szotkowski.pdf 1.17 MB

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