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Projektowanie i optymalizacja złożonych projektów układów cyfrowych w strukturach FPGA

Michał Popiołkiewicz

Record ID
WUTba5d66e1ffbf4f0b93cb0b1b9aff7eb8
Diploma type
Master of Science
Author
Michał Popiołkiewicz (FEIT/ICS) Michał Popiołkiewicz,, The Institute of Computer Science (FEIT/ICS)Faculty of Electronics and Information Technology (FEIT)
Supervisor
Andrzej Skorupski (FEIT/ICS) Andrzej Skorupski,, The Institute of Computer Science (FEIT/ICS)Faculty of Electronics and Information Technology (FEIT)
Certifying unit
Faculty of Electronics and Information Technology (FEIT)
Affiliation unit
The Institute of Computer Science (FEIT/ICS)
Language
(pl) Polish
Status
Finished
Issue date (year)
2002
Internal identifier
ENII-PM.000174
Keywords in Polish
PROJEKTOWANIE UKŁADÓW CYFROWYCH, KOMPUTEROWE METODY PROJEKTOWANIA, WYDAJNOŚĆ SYSTEMÓW PROJEKTOWANIA, FPGA

Uniform Resource Identifier
https://repo.pw.edu.pl/info/master/WUTba5d66e1ffbf4f0b93cb0b1b9aff7eb8/
URN
urn:pw-repo:WUTba5d66e1ffbf4f0b93cb0b1b9aff7eb8

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