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Implementation of a table lookup models of transistors in the Spice simulator

Mateusz Marian Poncyliusz

Abstract

This paper presents an implementation in the Spice simulator of a table look-up model of device with four terminals. The document contains also a description and comparison of used interpolation methods and apart from that it presents the technical aspects of the implementa-tion of the created model in the Ngspice simulator. A model will be used to simulate circuits based on transistors with two identical gates – VeSFET.
Diploma type
Engineer's / Bachelor of Science
Diploma type
Engineer's thesis
Author
Mateusz Marian Poncyliusz (FEIT) Mateusz Marian Poncyliusz,, Faculty of Electronics and Information Technology (FEIT)
Title in Polish
Implementacja tablicowych modeli tranzystorów w programie Spice
Supervisor
Dominik Krzysztof Kasprowicz (FEIT/MO) Dominik Krzysztof Kasprowicz,, The Institute of Microelectronics and Optoelectronics (FEIT/MO)Faculty of Electronics and Information Technology (FEIT)
Certifying unit
Faculty of Electronics and Information Technology (FEIT)
Affiliation unit
The Institute of Microelectronics and Optoelectronics (FEIT/MO)
Study subject / specialization
, Elektronika - Elektronika Biomedyczna
Language
(pl) Polish
Status
Finished
Defense Date
21-10-2016
Issue date (year)
2016
Pages
39
Internal identifier
43/I/16
Reviewers
Piotr Z. Wieczorek (FEIT/PE) Piotr Z. Wieczorek,, The Institute of Electronic Systems (FEIT/PE)Faculty of Electronics and Information Technology (FEIT) Dominik Krzysztof Kasprowicz (FEIT/MO) Dominik Krzysztof Kasprowicz,, The Institute of Microelectronics and Optoelectronics (FEIT/MO)Faculty of Electronics and Information Technology (FEIT)
Keywords in Polish
model tablicowy, interpolacja, VeSFET, Ngspice
Keywords in English
table model, interpolation, VeSFET, Ngspice
Abstract in Polish
Niniejsza praca ma na celu zaimplementowanie w symulatorze Spice modelu tablicowego przyrządu o czterech wyprowadzeniach. W pracy opisane i porównane zostały użyte metody interpolacyjne. Przedstawiono również techniczne aspekty implementacji stworzonego modelu w symulatorze Ngspice. Model posłuży do symulacji układów zbudowanych z tranzystorów o dwóch identycznych bramkach tj. VeSFET.
File
  • File: 1
    Mateusz_Poncyliusz_praca_inzynierska.pdf
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Local fields
Identyfikator pracy APD: 14429

Uniform Resource Identifier
https://repo.pw.edu.pl/info/bachelor/WUTd00031755ab74ffdab51f1aa294f65b1/
URN
urn:pw-repo:WUTd00031755ab74ffdab51f1aa294f65b1

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