Table-Based Model of a Dual-Gate Transistor for Statistical Circuit Simulation

Dominik Krzysztof Kasprowicz

Abstract

Table-based models of semiconductor devices are an attractive solution if a physics-based analytical model of the device cannot be found or has insufficient accuracy. Moreover, table-based models offer easy trade-off between evaluation speed and accuracy. Traditionally, the biggest disadvantage of this class of model has been the inability to take device variability into account. This paper presents a table-based model that can handle process-induced variations of multiple device parameters. The impact of those variations on device operation is modeled analytically using special transformations of the current-voltage and charge-voltage characteristics of the nominal (i.e. variation-free) device. In contrast to multidimensional interpolation between the I–V and Q–V curves of “corner” devices, the proposed approach is much less costly in terms of CPU time, RAM use, and time dedicated to device characterization. The model has been successfully used in statistical simulations of an amplifier and ring oscillator built with VeSFETs – dual-gate junctionless transistors.
Author Dominik Krzysztof Kasprowicz (FEIT / MO)
Dominik Krzysztof Kasprowicz,,
- The Institute of Microelectronics and Optoelectronics
Journal seriesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, (A 25 pkt)
Issue year2018
Volin press
Pages1-8
Publication size in sheets0.5
DOIDOI:10.1109/TCAD.2018.2852756
URL https://ieeexplore.ieee.org/document/8403271/
Languageen angielski
Score (nominal)25
ScoreMinisterial score = 25.0, 08-08-2018, ArticleFromJournal
Ministerial score (2013-2016) = 25.0, 08-08-2018, ArticleFromJournal
Publication indicators WoS Impact Factor: 2016 = 1.942 (2) - 2016=2.12 (5)
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* presented citation count is obtained through Internet information analysis and it is close to the number calculated by the Publish or Perish system.
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