Study of the clock signal quality impact on the PWM signal generated in FPGA
Robert Ugodziński , Michał Nowicki , Roman Szewczyk
AbstractIn the paper the clock signal quality impact on the PWM signal generated in FPGA is investigated. The study used a Spartan-6 system from Xilinx. In the first case the clock signal was generated by an external PLL, and then raised to a high frequency through an internal PLL. As an accurate source the ‘Fox XPRESSO Crystal Oscillator’ precision oscillator was used. Additionally, the PWM signal generated in FPGA was compared with the signal generated by the Atmega8 microcontroller.
|Publication size in sheets||0.5|
|Book||Jabłoński Ryszard, Březina Tomáš (eds.): Advanced Mechatronics Solutions, Advances in Intelligent Systems and Computing, 2016, Springer, ISBN 978-3-319-23921-7, 668 p., DOI:10.1007/978-3-319-23923-1|
|Keywords in English||FPGA PWM PLL precision crystal oscillator Xilinx Spartan-6|
|Score|| = 15.0, 05-09-2019, BookChapterSeriesAndMatConfByIndicator|
= 15.0, 05-09-2019, BookChapterSeriesAndMatConfByIndicator
|Publication indicators||= 0|
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