FPGA Based Fast Synchronous Serial Multi-Wire Links Synchronization
AbstractThe paper debates synchronization method of multi-wire, serial link of constant latency, by means of pseudo-random numbers generators. The solution was designed for various families of FPGA circuits. There were debated synchronization algorithm and functional structure of parameterized transmitter and receiver modules. The modules were realized in VHDL language in a behavioral form.
|Book||Romaniuk Ryszard (eds.): Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2013, vol. 8903, 2013, SPIE P.O. Box 10, Bellingham, Washington 98227-0010 USA , SPIE, ISBN 9780819497857, [ISSN 0277-786X ], 410 p., DOI:10.1117/12.2049644|
|Keywords in English||fast serial link, multi-wire link, data transmission, synchronization, FPGA, VHDL, Altera, Xilinx|
|Score|| = 10.0, 29-08-2020, BookChapterMatConfByIndicator|
= 15.0, 29-08-2020, BookChapterMatConfByIndicator
|Publication indicators||= 6; = 0; = 3.0|
|Citation count*||3 (2020-09-15)|
* presented citation count is obtained through Internet information analysis and it is close to the number calculated by the Publish or Perish system.