Robustness of digital approach to mismatch compensation in analog circuits realized in nanometer technologies

Zbigniew Jaworski , Piotr Wysokiński

Abstract

In this papers, a fully differential operational transconductance amplifier (OTA) implemented in 65 nm CMOS technology is analyzed to determine which component of the calibration circuitry is most susceptible to manufacturing process disturbances and thus impairs robustness of the calibration methodology. The average offset voltage of the OTA can be significantly reduced. It has been shown that effectiveness of the calibration methodology is limited by the offset voltage of the comparator that calculates sign of the OTA offset voltage.
Author Zbigniew Jaworski (FEIT / MO)
Zbigniew Jaworski,,
- The Institute of Microelectronics and Optoelectronics
, Piotr Wysokiński (FEIT / MO)
Piotr Wysokiński,,
- The Institute of Microelectronics and Optoelectronics
Pages1-7
Book Szczepański Paweł, Kisiel Ryszard, Romaniuk Ryszard (eds.): Proceedings of SPIE Electron Technology Conference 2013, vol. 1, no. 8902, 2013, P.O.Box 10, Bellingham, Washington 98227-0010 USA, SPIE, ISBN 9780819495211, 752 p., DOI:10.1117/12.2033297
Keywords in EnglishMismatch compensation, analog circuits, nanometr technology
DOIDOI:10.1117/12.2031697
URL http://spie.org/x648.xml?product_id=2031697
Languageen angielski
Score (nominal)15
ScoreMinisterial score = 10.0, BookChapterMatConfByIndicator
Ministerial score (2013-2016) = 15.0, BookChapterMatConfByIndicator
Publication indicators Scopus Citations = 5; WoS Citations = 0; GS Citations = 6.0
Citation count*6 (2020-05-14)
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* presented citation count is obtained through Internet information analysis and it is close to the number calculated by the Publish or Perish system.
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