Bipolar transistor in VESTIC technology

Wiesław Kuźmicz , Piotr Mierzwiński


VESTIC technology was proposed as an alternative for traditional CMOS technology. It offers a new FET-type twin gate junctionless device called VeSFET. In addition, in the basic VESTIC device structure many different active devices can be made, including bipolar transistors. This allows easy integration of bipolar transistors (called here VeSBJT) with VeSFET transistors. The purpose of this paper is to investigate the expected properties of VeSBJT in order to answer the following questions: are the expected parameters of VeSBJT promising enough to justify further research and fabrication experiments, and will VeSBJTs be technologically compatible with VeSFETs? Our theoretical predictions are based on the concept of effective base width for bipolar transistors with non-plane-parallel emitter and collector junctions. The conclusion is that VeSBJT can be a device with useful characteristics. As a result, VESTIC may have the potential to become a new BiCMOS-type technology.
Author Wiesław Kuźmicz (FEIT / MO)
Wiesław Kuźmicz,,
- The Institute of Microelectronics and Optoelectronics
, Piotr Mierzwiński - [Warsaw University of Technology (PW)]
Piotr Mierzwiński,,
- Politechnika Warszawska
Book Szczepański Paweł, Kisiel Ryszard, Romaniuk Ryszard (eds.): Proceedings of SPIE Electron Technology Conference 2013, vol. 1, no. 8902, 2013, P.O.Box 10, Bellingham, Washington 98227-0010 USA, SPIE, ISBN 9780819495211, 752 p., DOI:10.1117/12.2033297
Keywords in EnglishVESTIC, VeSFET, VeSBJT, bipolar transistor, cylindrical junction, polisilicon emitter
Languageen angielski
8902_78.pdf 944.58 KB
Score (nominal)15
Score sourceconferenceIndex
ScoreMinisterial score = 10.0, 05-06-2020, BookChapterMatConfByIndicator
Ministerial score (2013-2016) = 15.0, 05-06-2020, BookChapterMatConfByIndicator
Publication indicators Scopus Citations = 1; WoS Citations = 0; GS Citations = 2.0
Citation count*2 (2020-09-07)
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