Efficient logic synthesis for FPGAs with functional decomposition based on information relationship measures

Mariusz Rawski , Tadeusz Łuba , L Jóźwiak , A. Chojnacki

Abstract

General functional decomposition has important applications in many fields of modern engineering and science. Its practical usefulness for very complex systems is, however, limited by the lack of an effective and efficient method for selection of the appropriate input supports for subsystems. A classical method based on a systematic search of the whole solution space is inefficient. In this paper, an effective heuristic method for input support selection is proposed and discussed. The method is based on application of information relationship measures, which allows us to reduce the search space to a manageable size while keeping high-quality solutions in the reduced space. Experimental results demonstrate that the proposed heuristic method is able to construct optimal or near-optimal supports efficiently, even for large systems. It is much faster than the systematic method while delivering results of comparable quality
Author Mariusz Rawski IT
Mariusz Rawski,,
- The Institute of Telecommunications
, Tadeusz Łuba IT
Tadeusz Łuba,,
- The Institute of Telecommunications
, L Jóźwiak
L Jóźwiak,,
-
, A. Chojnacki
A. Chojnacki,,
-
Pages8-15 vol.1
Book Euromicro Conference, 1998. Proceedings. 24th, vol. 1, 1998
Keywords in EnglishCircuit synthesis, CMOS logic circuits, CMOS technology, digital circuits, field programmable gate arrays, FPGA, Functional decomposition, heuristic method, heuristic programming, high-quality solutions, Information analysis, information relationship measures, large-scale systems, large systems, logic circuits, logic design, logic partitioning, Logic synthesis, Microelectronics, near-optimal supports, search problems, search space reduction, Size measurement, subsystem input support selection, systematic solution-space search
DOIDOI:10.1109/EURMIC.1998.711767
Score (nominal)1
Citation count*5 (2018-06-17)
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