Small-signal admittance model as a characterization tool of the MOS tunnel diode

Jakub Maciej Jasiński , Bogdan Majkusiak

Abstract

The tunnel leakage through the insulator layer of metal \#x2013;insulator \#x2013;semiconductor tunnel diodes and its small-signal admittance is investigated by means of a theoretical model of the metal \#x2013;oxide \#x2013;semiconductor tunnel diode based on a steady-state algorithm and the minority carrier relaxation time. The conclusions are reviewed using an experimental Al-SiO2-Si structure with an ultrathin oxide layer.
Author Jakub Maciej Jasiński (FEIT / MO)
Jakub Maciej Jasiński,,
- The Institute of Microelectronics and Optoelectronics
, Bogdan Majkusiak (FEIT / MO)
Bogdan Majkusiak,,
- The Institute of Microelectronics and Optoelectronics
Journal seriesJOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, ISSN 1071-1023
Issue year2013
Vol31
No1
Pages1-7
Keywords in Englishaluminium, carrier relaxation time, MIS structures, silicon compounds, tunnel diodes
ASJC Classification2208 Electrical and Electronic Engineering; 3104 Condensed Matter Physics
DOIDOI:10.1116/1.4769892
Languageen angielski
Score (nominal)25
Score sourcejournalList
ScoreMinisterial score = 25.0, 23-12-2019, ArticleFromJournal
Ministerial score (2013-2016) = 25.0, 23-12-2019, ArticleFromJournal
Publication indicators Scopus Citations = 8; WoS Citations = 8; GS Citations = 10.0; WoS Impact Factor: 2013 = 1.358 (2) - 2013=1.233 (5)
Citation count*10 (2020-09-02)
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* presented citation count is obtained through Internet information analysis and it is close to the number calculated by the Publish or Perish system.
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