One channel capacitance tomograph with hardware implementation of image reconstruction algorithm
- Piotr Czarnecki,
- Łukasz Dańko,
- Roman Szabatin
One channel capacitance tomograph was described. Its modular design gives the opportunity to test different measurement circuits. Described tomograph use measurement circuit based on CDC (Capacitance-to-Digital Converter). Control unit of the tomograph was implemented inside FPGA as a microprocessor system with hardware implementation of image reconstruction algorithm. The Landweber iterative image reconstruction algorithm was implemented.
- Record ID
- IEEE International Workshop on Imaging Systems and Techniques, 2009. IST '09, 2009
- Keywords in English
- capacitance, capacitance-to-digital converter, field programmable gate arrays, FPGA, hardware implementation, image reconstruction, iterative methods, Landweber iterative algorithm, microprocessor system, one channel capacitance tomograph, tomography
- DOI:10.1109/IST.2009.5071642 Opening in a new tab
- (en) English
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