New trends in logic synthesis for both digital designing and data processing

Grzegorz Borowik , Tadeusz Łuba , Krzysztof Poźniak

Abstract

FPGA devices are equipped with memory-based structures. These memories act as very large logic cells where the number of inputs equals the number of address lines. At the same time, there is a huge demand in the market of Internet of Things for devices implementing virtual routers, intrusion detection systems, etc.; where such memories are crucial for realizing pattern matching circuits, IP address tables, and other. Unfortunately, existing CAD tools are not well suited to utilize capabilities that such large memory blocks offer due to the lack of appropriate synthesis procedures. This paper presents methods which are useful for memory-based implementations: minimization of the number of input variables and functional decomposition.
Author Grzegorz Borowik IT
Grzegorz Borowik,,
- The Institute of Telecommunications
, Tadeusz Łuba IT
Tadeusz Łuba,,
- The Institute of Telecommunications
, Krzysztof Poźniak ISE
Krzysztof Poźniak,,
- The Institute of Electronic Systems
Pages 100314U-1- 100314U-11
Publication size in sheets0.5
Book Romaniuk Ryszard (eds.): Proc. SPIE. 10031, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2016, vol. 10031, 2016, SPIE , ISBN 9781510604858, [781510604865 (electronic) ], 1170 p., DOI:10.1117/12.2257157
Keywords in English functional decomposition, complement, minimal cover, indispensable variable, argument reduction.
DOIDOI:10.1117/12.2249240
URL http://dx.doi.org.spiedl.eczyt.bg.pw.edu.pl/10.1117/12.2249240
projectThe Develpment of Digital Communicatios. Project leader: Siuzdak Jerzy, , Phone: +48 22 234-7232, start date 27-04-2015, end date 31-12-2016, IT/2015/statut, Completed
WEiTI Działalność statutowa
Languageen angielski
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100314UPozniak.pdf (file archived - login or check accessibility on faculty) 100314UPozniak.pdf 250.81 KB
Score (nominal)15
ScoreMinisterial score = 15.0, 27-03-2017, BookChapterMatConf
Ministerial score (2013-2016) = 15.0, 27-03-2017, BookChapterMatConf
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