A Resistorless Current Reference Source for 65 nm CMOS Technology with Low Sensitivity to Process, Supply Voltage and Temperature Variations

Michał Łukaszewicz , Tomasz Borejko , Witold Pleskacz

Abstract

A reistorless current reference source, e.g. for fast communication interfaces, has been described. Addition of currents with opposite temperature coefficient (PTC and NTC) and body effect have been used to temperature compensation. Cascode structures have been used to improve the power supply rejection ratio. The reference current source has been designed in a GLOBALFOUNDRIES 65 nm technology. The presented circuit achieves 55 ppm/°C temperature coefficient over range of -40°C to 125°C. Reference current susceptibility to process parameters variation is ±3 %. The power supply rejection ratio without any filtering capacitor at 100 Hz and 10 MHz is lower than -127 dB and -103 dB, respectively.
Author Michał Łukaszewicz (FEIT / MO)
Michał Łukaszewicz,,
- The Institute of Microelectronics and Optoelectronics
, Tomasz Borejko (FEIT / MO)
Tomasz Borejko,,
- The Institute of Microelectronics and Optoelectronics
, Witold Pleskacz (FEIT / MO)
Witold Pleskacz,,
- The Institute of Microelectronics and Optoelectronics
Pages75-79
Publication size in sheets0.5
Book Łukaszewicz Michał: Proceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2011, IEEE, ISBN 978-1-4244-9755-3, 472 p., DOI:10.1109/DDECS.2011.5783051
DOIDOI:10.1109/DDECS.2011.5783051
URL http://ieeexplore.ieee.org/document/5783051/
Languageen angielski
Score (nominal)10
Publication indicators Scopus Citations = 9; WoS Citations = 5; GS Citations = 16.0
Citation count*16 (2020-01-11)
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* presented citation count is obtained through Internet information analysis and it is close to the number calculated by the Publish or Perish system.
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